schematic refactoring, new pcb design

This commit is contained in:
2025-01-12 12:35:10 +01:00
parent 165f360c5e
commit ccf4ab02d9
16 changed files with 368291 additions and 6789 deletions

View File

@@ -495,7 +495,7 @@
"name": "vcc",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.4,
"track_width": 0.3,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
@@ -538,6 +538,14 @@
{
"netclass": "vcc",
"pattern": "/-BT1"
},
{
"netclass": "+5V",
"pattern": "coil+"
},
{
"netclass": "vcc",
"pattern": "+3.3V"
}
]
},
@@ -549,7 +557,7 @@
"plot": "./vbox-v0.1",
"pos_files": "",
"specctra_dsn": "",
"step": "boxmod.step",
"step": "boxmod-v0.2.step",
"svg": "",
"vrml": ""
},
@@ -691,6 +699,24 @@
"label": "Description",
"name": "Description",
"show": false
},
{
"group_by": false,
"label": "Sim.Type",
"name": "Sim.Type",
"show": false
},
{
"group_by": false,
"label": "Sim.Device",
"name": "Sim.Device",
"show": false
},
{
"group_by": false,
"label": "Sim.Pins",
"name": "Sim.Pins",
"show": false
}
],
"filter_string": "",